AMD Epyc Embedded 9004 Series Processors vulnerabilities
12 CVEs affecting AMD Epyc Embedded 9004 Series Processors, 0 known to be exploited (CISA KEV), with EPSS scores. Latest: CVE-2025-54510, published 2026-04-16.
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Known exploited (CISA KEV) first, then by EPSS exploit probability.
- CVE-2024-36350, published 2025-07-08. Medium severity, CVSS 5.6. EPSS: 0.5% chance of exploitation in the next 30 days. A transient execution vulnerability in some AMD processors may allow an attacker to infer data from previous stores, potentially resulting in the leakage of privileged information.
- CVE-2024-36357, published 2025-07-08. Medium severity, CVSS 5.6. EPSS: 0.4% chance of exploitation in the next 30 days. A transient execution vulnerability in some AMD processors may allow an attacker to infer data in the L1D cache, potentially resulting in the leakage of sensitive information across privileged…
- CVE-2024-36348, published 2025-07-08. Low severity, CVSS 3.8. EPSS: 0.3% chance of exploitation in the next 30 days. A transient execution vulnerability in some AMD processors may allow a user process to infer the control registers speculatively even if UMIP feature is enabled, potentially resulting in information…
- CVE-2024-36349, published 2025-07-08. Low severity, CVSS 3.8. EPSS: 0.2% chance of exploitation in the next 30 days. A transient execution vulnerability in some AMD processors may allow a user process to infer TSC_AUX even when such a read is disabled, potentially resulting in information leakage.
- CVE-2024-21953, published 2026-02-10. Medium severity, CVSS 5.9. EPSS: 0.2% chance of exploitation in the next 30 days. Improper input validation in IOMMU could allow a malicious hypervisor to reconfigure IOMMU registers resulting in loss of guest data integrity.
- CVE-2024-36354, published 2025-09-06. High severity, CVSS 7.5. EPSS: 0.2% chance of exploitation in the next 30 days. Improper input validation for DIMM serial presence detect (SPD) metadata could allow an attacker with physical access, ring0 access on a system with a non-compliant DIMM, or control over the Root of…
- CVE-2024-36331, published 2025-09-06. Low severity, CVSS 3.2. EPSS: 0.2% chance of exploitation in the next 30 days. Improper initialization of CPU cache memory could allow a privileged attacker with hypervisor access to overwrite SEV-SNP guest memory resulting in loss of data integrity.
- CVE-2024-21977, published 2025-09-05. Low severity, CVSS 3.2. EPSS: 0.2% chance of exploitation in the next 30 days. Incomplete cleanup after loading a CPU microcode patch may allow a privileged attacker to degrade the entropy of the RDRAND instruction, potentially resulting in loss of integrity for SEV-SNP guests.
- CVE-2025-0031, published 2026-02-10. Medium severity, CVSS 4.6. EPSS: 0.1% chance of exploitation in the next 30 days. A use after free in the SEV firmware could allow a malicous hypervisor to activate a migrated guest with the SINGLE_SOCKET policy on a different socket than the migration agent potentially resulting…
- CVE-2023-31351, published 2025-09-06. Medium severity, CVSS 5.3. EPSS: 0.1% chance of exploitation in the next 30 days. Improper restriction of operations in the IOMMU could allow a malicious hypervisor to access guest private memory resulting in loss of integrity.
Latest
- CVE-2025-54510, published 2026-04-16. Medium severity, CVSS 5.9. EPSS: 0.1% chance of exploitation in the next 30 days. A missing lock verification in AMD Secure Processor (ASP) firmware may permit a locally authenticated attacker with administrative privileges to alter MMIO routing on some Zen 5-based products,…
- CVE-2023-20585, published 2026-04-16. Medium severity, CVSS 5.6. EPSS: 0.1% chance of exploitation in the next 30 days. Insufficient checks of the RMP on host buffer access in IOMMU may allow an attacker with privileges and a compromised hypervisor to trigger an out of bounds condition without RMP checks, resulting in…