CVE-2025-0647: Arm c1-Premium Firmware

High severity, CVSS 7.9. EPSS: 0.2% chance of exploitation in the next 30 days.

In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

Affected products

• Arm c1-Premium Firmware: affected versions not specified
• Arm c1-Ultra Firmware: affected versions not specified
• Arm Cortex-a710 Firmware: affected versions not specified
• Arm Cortex-x2 Firmware: affected versions not specified
• Arm Cortex-x3 Firmware: affected versions not specified
• Arm Cortex-x4 Firmware: affected versions not specified
• Arm Cortex-x925 Firmware: affected versions not specified
• Arm Neoverse-n2 Firmware: affected versions not specified
• Arm Neoverse-v2 Firmware: affected versions not specified
• Arm Neoverse-v3 Firmware: affected versions not specified
• Arm Neoverse-v3ae Firmware: affected versions not specified

Published 2026-01-14. Last modified 2026-06-17.